火范文>英语词典>soft-core翻译和用法

soft-core

英 [ˈsɒft kɔː(r)]

美 [ˈsɔːft kɔːr]

adj.  软性色情的; (性描写等)隐晦的,含蓄的

牛津词典

    adj.

    • 软性色情的;(性描写等)隐晦的,含蓄的
      showing or describing sexual activity without being too detailed or shocking

      柯林斯词典

      • (性描写)非赤裸裸的,较隐晦的
        Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.

        双语例句

        • For the digital part, this design is mean to construct the SOPC system in the FPGA, embedded Nios II soft-core processor to control the operation of the entire system.
          对于数字部分,在FPGA内构建SOPC系统,嵌入NIOSii软核处理器对整个系统进行控制。
        • Design and Implementation of Multi-channel Phone-billing-system Based upon NIOS Soft-core CPU
          基于NIOS软核CPU技术的多路电话计费系统的设计与实现
        • Implementation of Soft-Core Processor and DDFS Based on FPGA
          基于FPGA的软核处理器及DDFS实现
        • According to the structure model of data acquisition and processing system connected by Ethernet, the network interface module based on the Nios soft-core system is designed to construct the network data acquisition system.
          为构建网络化的数据采集系统,根据数据采集模块与处理控制模块通过以太网相连接的结构模型,设计了基于Nios软核系统的嵌入式以太网网络接口模块。
        • First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
          第一,运用了在单芯片上实现系统功能的设计思想,采用了高性能的软核处理器(NiosIICPU)和IP复用技术,提高了整个系统的运行速度和进一步改进的灵活性。
        • Research and Design of Soft-core IP for AVS Inter Decoder
          AVS帧间解码IP软核的研究与设计
        • To solute the problem, the idea of kernel hardware design has been put forward. System architecture is divided into soft-core and hardcore. Hardcore will manage application tasks as a coprocessor to improve the real time of system.
          针对实时性问题,提出将内核硬件化设计的思想,将系统的体系结构划分为软核和硬核,硬核作为协处理器管理应用任务,提高系统的实时性,使系统的性能得到明显的提高。
        • Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
          详细设计了帧间解码IP软核,包括运动矢量生成模块、预测处理模块和插值模块。
        • I distinctly remember my high school self, wide-eyed, poring over the soft-core Starr report with friends.
          我还清楚地记得高中时代的我,睁大了眼睛,和朋友们一起狼吞虎咽地读着《斯塔尔报告》(StarrReport)中那些香艳的内容。
        • In practice, the designer can use this soft-core as a communication module through the FPGA implementation or to quickly build a Field Bus communication system to realize flexible CAN bus interface solutions.
          在实际应用中设计者可以将此软核作为通讯模块通过FPGA实现,或者快速搭建现场总线通信系统,实现灵活的CAN总线接口方案。